Altium

Design Rule Verification Report

Date:		2017/1/1
Time:		17:51:01
Elapsed Time:		00:00:05
Filename:		D:\STM32MX\AnanasSTM32Cube\PCB\PCB_Project\AnanasSTM32.PcbDoc

Warnings:		0
Rule Violations:		0

Summary

Warnings	Count
Total	0

Rule Violations	Count
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Un-Routed Net Constraint ( (All) )	0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)	0
Hole Size Constraint (Min=0.0254mm) (Max=5mm) (Disabled)(All)	0
Hole To Hole Clearance (Gap=0.254mm) (Disabled)(All),(All)	0
Minimum Solder Mask Sliver (Gap=0.1mm) (All),(All)	0
Silk To Solder Mask (Clearance=0mm) (Disabled)(IsPad),(All)	0
Silk to Silk (Clearance=0mm) (Disabled)(All),(All)	0
Net Antennae (Tolerance=0mm) (All)	0
Modified Polygon (Allow modified: No), (Allow shelved: No)	0
Width Constraint (Min=0.2mm) (Max=1.5mm) (Preferred=0.2032mm) (All)	0
Clearance Constraint (Gap=0.15mm) (All),(All)	0
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)	0
Total	0